Ein Roboter mit bürstenlosem Antrieb, differenzial und NRF24L01 Funk. Großflächig gebaut um ein großes Solarpanel aufzunehmen. https://gitlab.informatik.hs-fulda.de/fdai5253/roboter
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  1. #include "myInterrupts.h"
  2. myInterrupts::myInterrupts(){}
  3. myInterrupts::initTimer1(){
  4. // reset a timer unit (replace X by timer number)
  5. TCCR1A = 0; // set TCCRXA register to 0
  6. TCCR1B = 0; // set TCCRXB register to 0
  7. TCNT1 = 0; // reset counter value
  8. // 1:1
  9. TCCR1B |= (1 << CS10);
  10. OCR1A = 15999; // set compare match register of timer 1 (max. value: 65536 = 2^16 - 1), 16000 ~ 1 millisecond
  11. //enable timer
  12. TCCR1B |= (1 << WGM12); // enable timer1 CTC mode
  13. TIMSK1 |= (1 << OCIE2A); // enable timer1 compare interrupt
  14. }
  15. myInterrupts::disableTimer1Interrupt(){
  16. TIMSK1 &= ~(1 << OCIE2A); // disable timer1 compare interrupt
  17. }
  18. myInterrupts::enableTimer1Interrupt(){
  19. TIMSK1 |= (1 << OCIE2A); // enable timer1 compare interrupt
  20. }
  21. //Timer2
  22. myInterrupts::initTimer2(){
  23. // reset a timer unit (replace X by timer number)
  24. TCCR2A = 0; // set TCCRXA register to 0
  25. TCCR2B = 0; // set TCCRXB register to 0
  26. TCNT2 = 0; // reset counter value
  27. TCCR2A |= (1 << WGM21); // enable timer1 CTC mode
  28. TCCR2A |= (1 << WGM20);
  29. // 1:64
  30. TCCR2B |= (1 << CS22);
  31. OCR2A = 249; // set compare match register of timer 1 (max. value: 65536 = 2^16 - 1), 16000 ~ 1 millisecond
  32. //enable timer
  33. TIMSK2 |= (1 << OCIE2A); // enable timer1 compare interrupt
  34. }
  35. myInterrupts::initTimer2SoftPWM(){
  36. // reset a timer unit (replace X by timer number)
  37. TCCR2A = 0; // set TCCRXA register to 0
  38. TCCR2B = 0; // set TCCRXB register to 0
  39. TCNT2 = 0; // reset counter value
  40. TCCR2A |= (1 << WGM21); // enable timer1 CTC mode
  41. //TCCR2A |= (1 << WGM20);
  42. // 1:8
  43. // TCCR2B |= (1 << CS20);
  44. TCCR2B |= (1 << CS21);
  45. //TCCR2B |= (1 << CS20);
  46. OCR2A = 100; // set compare match register of timer 2 (max. value: 255 = 2^8 - 1) (100µs) ca. 78Hz
  47. //enable timer
  48. TIMSK2 |= (1 << OCIE2A); // enable timer1 compare interrupt
  49. }
  50. myInterrupts::disableTimer2Interrupt(){
  51. TIMSK2 &= ~(1 << OCIE2A); // disable timer1 compare interrupt
  52. }
  53. myInterrupts::enableTimer2Interrupt(){
  54. TIMSK2 |= (1 << OCIE2A); // enable timer1 compare interrupt
  55. }
  56. //OCR1B
  57. myInterrupts::initOCR1B(){
  58. // reset a timer unit (replace X by timer number)
  59. TCCR1A = 0; // set TCCRXA register to 0
  60. TCCR1B = 0; // set TCCRXB register to 0
  61. TCNT1 = 0; // reset counter value
  62. //OC1B behaviour
  63. TCCR1A |= (1 << COM1B1);
  64. // TCCR1A |= (1 << COM1B0);
  65. TCCR1A |= (1 << WGM10);
  66. // TCCR1A |= (1 << WGM11);
  67. // 1:1, 62.5kHz
  68. TCCR1B |= (1 << CS10);
  69. TCCR1B |= (1 << WGM12);
  70. // TCCR1B |= (1 << WGM13);
  71. OCR1B = 127; // set compare match register of timer 1 (max. value: 65536 = 2^16 - 1), 16000 ~ 1 millisecond
  72. //enable timer
  73. TIMSK1 = 0; //no Interrupts
  74. }